- High performance superharvard architecture
- 32-bit processor
- It can execute every instruction in a single cycle
- Fast,flexible arithmetical computation units
- Dual address generators
- Efficient program sequencing
- It has 10-port data register file
- The ADSP 21000 family processors have 2 data address generators
- Architectural features supporting high level languages and operating systems
- support IEEE 1149,IJTAG serial scan path & on-chip emulation features
- General purpose data & address register file
- Large address space
- Pre & post modify addressing
- Onchip program , loop & interrupt stacks
expaworld.blogspot.com is website for engineering students for learning about micro-controllers,micro-processors,embedded systems etc
Thursday, 4 October 2012
ADSP 21XXX SHARC
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